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Font FTDI FT_Gpu_Hal.c

May 08, 2019

#include "FT_Platform.h"


/ * API per inicialitzar la interfície SPI * /

ft_bool_t Ft_Gpu_Hal_Init (Ft_Gpu_HalInit_t * halinit)

{

#ifdef ARDUINO_PLATFORM_SPI

PINMode (FT_ARDUINO_PRO_SPI_CS, OUTPUT);

PINMode (FT800_PD_N, OUTPUT);

digitalWrite (FT_ARDUINO_PRO_SPI_CS, HIGH);

digitalWrite (FT800_PD_N, HIGH);

#endif


#ifdef MSVC_PLATFORM_SPI

/ * Inicialitza la libmpsse * /

Init_libMPSSE ();

SPI_GetNumChannels (& halinit-> TotalChannelNum);

/ * Per defecte estic assumint que només es connecta un cable mpsse a l'ordinador i el canal 0 d'aquest cable mpsse s'utilitza per a transaccions spi * /

si (halinit-> TotalChannelNum> 0)

{

FT_DEVICE_LIST_INFO_NODE devList;

SPI_GetChannelInfo (0, i devList);

printf ("Informació sobre el nombre de canal% d:", 0);

/ * imprimeix la informació dev * /

printf ("Flags = 0x% x", devList.Flags);

printf ("Type = 0x% x", devList.Type);

printf ("ID = 0x% x", devList.ID);

printf ("LocId = 0x% x", devList.LocId);

printf ("SerialNumber =% s", devList.SerialNumber);

printf ("Descripció =% s", devList.Description);

printf ("ftHandle = 0x% x", devList.ftHandle); / * és 0 a menys que estigui obert * /

}

#endif

tornar TRUE;

}


ft_bool_t Ft_Gpu_Hal_Open (host Ft_Gpu_Hal_Context_t *)

{

#ifdef MSVC_FT800EMU

Ft_GpuEmu_SPII2C_begin ();

#endif

#ifdef ARDUINO_PLATFORM_SPI

SPI.begin ();

SPI.setClockDivider (SPI_CLOCK_DIV2);

SPI.setBitOrder (MSBFIRST);

SPI.setDataMode (SPI_MODE0);

#endif

#ifdef MSVC_PLATFORM_SPI

CanalConfig canalConf; // configuració del canal

Estat FT_STATUS;

/ * configura la configuració spi * /

channelConf.ClockRate = host-> hal_config.spi_clockrate_khz * 1000;

channelConf.LatencyTimer = 2;

channelConf.configOptions = SPI_CONFIG_OPTION_MODE0 | SPI_CONFIG_OPTION_CS_DBUS3 | SPI_CONFIG_OPTION_CS_ACTIVELOW;

channelConf.Pin = 0x00000000; / * FinalVal-FinalDir-InitVal-InitDir (per dir 0 = in, 1 = out) * /


/ * Obriu el primer canal disponible * /

SPI_OpenChannel (host-> hal_config.channel_no, (FT_HANDLE *) & host-> hal_handle);

status = SPI_InitChannel ((FT_HANDLE) host-> hal_handle, & channelConf);

printf ("handle = 0x% x status = 0x% x", host-> hal_handle, status);

#endif

host-> ft_cmd_fifo_wp = host-> ft_dl_buff_wp = 0;

host-> estat = FT_GPU_HAL_OPENED;

tornar TRUE;

}


ft_void_t Ft_Gpu_Hal_Close (Ft_Gpu_Hal_Context_t * host)

{

host-> estat = FT_GPU_HAL_CLOSED;

#ifdef MSVC_PLATFORM_SPI

/ * Tanca el canal * /

SPI_CloseChannel (host-> hal_handle);

#endif

#ifdef ARDUINO_PLATFORM_SPI

SPI.end ();

#endif

#ifdef MSVC_FT800EMU

Ft_GpuEmu_SPII2C_end ();

#endif

}


ft_void_t Ft_Gpu_Hal_DeInit ()

{

#ifdef MSVC_PLATFORM_SPI

// Neteja del MPSSE Lib

Cleanup_libMPSSE ();

#endif

}


/ * Les API per a la transferència de lectura / escriptura de forma contínua només amb un sistema de memòria intermèdia petit

ft_void_t Ft_Gpu_Hal_StartTransfer (host Ft_Gpu_Hal_Context_t *, FT_GPU_TRANSFERDIR_T rw, ft_uint32_t addr)

{

si (FT_GPU_READ == rw) {

#ifdef MSVC_PLATFORM_SPI

ft_uint8_t Transfer_Array [4];

ft_uint32_t SizeTransfered;


/ * Redacteu el paquet llegit * /

Transfer_Array [0] = addr >> 16;

Transfer_Array [1] = addr >> 8;

Transfer_Array [2] = addr;


Transfer_Array [3] = 0; // byte de lectura dummy

SPI_Write ((FT_HANDLE) host-> hal_handle, Transfer_Array, sizeof (Transfer_Array), & SizeTransfered, SPI_TRANSFER_OPTIONS_SIZE_IN_BYTES | SPI_TRANSFER_OPTIONS_CHIPSELECT_ENABLE);

#endif

#ifdef ARDUINO_PLATFORM_SPI

digitalWrite (FT_ARDUINO_PRO_SPI_CS, LOW);

SPI.transfer (addr >> 16);

SPI.transfer (highByte (addr));

SPI.transfer (lowByte (addr));


SPI.transfer (0); // Dummy Read Byte

#endif

#ifdef MSVC_FT800EMU

Ft_GpuEmu_SPII2C_StartRead (addr);

#endif

host-> estat = FT_GPU_HAL_READING;

} else {

#ifdef MSVC_PLATFORM_SPI

ft_uint8_t Transfer_Array [3];

ft_uint32_t SizeTransfered;


/ * Redacteu el paquet llegit * /

Transfer_Array [0] = (0x80 | (addr >> 16));

Transfer_Array [1] = addr >> 8;

Transfer_Array [2] = addr;

SPI_Write ((FT_HANDLE) host-> hal_handle, Transfer_Array, 3, i SizeTransfered, SPI_TRANSFER_OPTIONS_SIZE_IN_BYTES | SPI_TRANSFER_OPTIONS_CHIPSELECT_ENABLE);

#endif

#ifdef ARDUINO_PLATFORM_SPI

digitalWrite (FT_ARDUINO_PRO_SPI_CS, LOW);

SPI.transfer (0x80 | (addr >> 16));

SPI.transfer (highByte (addr));

SPI.transfer (lowByte (addr));

#endif

#ifdef MSVC_FT800EMU

Ft_GpuEmu_SPII2C_StartWrite (addr);

#endif

host-> estat = FT_GPU_HAL_WRITING;

}

}


/ * Les API per a la transferència d’escriptura continuen només * /

ft_void_t Ft_Gpu_Hal_StartCmdTransfer (Ft_Gpu_Hal_Context_t * host, FT_GPU_TRANSFERDIR_T rw, compte ft_uint16_t)

{

Ft_Gpu_Hal_StartTransfer (amfitrió, rw, host-> ft_cmd_fifo_wp + RAM_CMD);

}

ft_uint8_t Ft_Gpu_Hal_TransferString (host Ft_Gpu_Hal_Context_t *, const ft_char8_t * string)

{

ft_uint16_t length = strlen (string);

while (length -) {

Ft_Gpu_Hal_Transfer8 (host, * string);

cadena ++;

}

// Afegeix una indicació nul com a indicador final

Ft_Gpu_Hal_Transfer8 (host, 0);

}


ft_uint8_t Ft_Gpu_Hal_Transfer8 (Ft_Gpu_Hal_Context_t * host, valor ft_uint8_t)

{

#ifdef ARDUINO_PLATFORM_SPI

tornar SPI.transfer (valor);

#endif

#ifdef MSVC_PLATFORM_SPI

ft_uint32_t SizeTransfered;

si (host-> estat == FT_GPU_HAL_WRITING) {

SPI_Write (host-> hal_handle, i valor, sizeof (valor), & SizeTransfered, SPI_TRANSFER_OPTIONS_SIZE_IN_BYTES);

} else {

SPI_Read (host-> hal_handle, & valor, sizeof (valor), & SizeTransfered, SPI_TRANSFER_OPTIONS_SIZE_IN_BYTES);

}


if (SizeTransfered! = sizeof (value))

host-> estat = FT_GPU_HAL_STATUS_ERROR;

valor de retorn;

#endif

#ifdef MSVC_FT800EMU

torneu Ft_GpuEmu_SPII2C_transfer (valor);

#endif

}


ft_uint16_t Ft_Gpu_Hal_Transfer16 (Ft_Gpu_Hal_Context_t * host, valor ft_uint16_t)

{

ft_uint16_t retVal = 0;

si (host-> estat == FT_GPU_HAL_WRITING) {

Ft_Gpu_Hal_Transfer8 (host, valor i 0xFF); // primer LSB

Ft_Gpu_Hal_Transfer8 (host, (valor >> 8) i 0xFF);

} else {

retVal = Ft_Gpu_Hal_Transfer8 (host, 0);

retVal | = (ft_uint16_t) Ft_Gpu_Hal_Transfer8 (amfitrió, 0) <>

}


tornar retVal;

}


ft_uint32_t Ft_Gpu_Hal_Transfer32 (Ft_Gpu_Hal_Context_t * host, valor ft_uint32_t)

{

ft_uint32_t retVal = 0;

si (host-> estat == FT_GPU_HAL_WRITING) {

Ft_Gpu_Hal_Transfer16 (amfitrió, valor i 0xFFFF); // primer LSB

Ft_Gpu_Hal_Transfer16 (amfitrió, (valor >> 16) i 0xFFFF);

} else {

retVal = Ft_Gpu_Hal_Transfer16 (host, 0);

retVal | = (ft_uint32_t) Ft_Gpu_Hal_Transfer16 (amfitrió, 0) <>

}

tornar retVal;

}


ft_void_t Ft_Gpu_Hal_EndTransfer (host Ft_Gpu_Hal_Context_t *)

{

#ifdef MSVC_PLATFORM_SPI

// Només desigualleu el CS: envieu 0 bytes amb desactivar CS

SPI_ToggleCS ((FT_HANDLE) host-> hal_handle, FALSE);

#endif

#ifdef ARDUINO_PLATFORM_SPI

digitalWrite (FT_ARDUINO_PRO_SPI_CS, HIGH);

#endif

#ifdef MSVC_FT800EMU

Ft_GpuEmu_SPII2C_csHigh ();

#endif

host-> estat = FT_GPU_HAL_OPENED;

}


ft_uint8_t Ft_Gpu_Hal_Rd8 (host Ft_Gpu_Hal_Context_t *, ft_uint32_t addr)

{

valor ft_uint8_t;

Ft_Gpu_Hal_StartTransfer (amfitrió, FT_GPU_READ, addr);

value = Ft_Gpu_Hal_Transfer8 (host, 0);

Ft_Gpu_Hal_EndTransfer (host);

valor de retorn;

}

ft_uint16_t Ft_Gpu_Hal_Rd16 (host Ft_Gpu_Hal_Context_t *, ft_uint32_t addr)

{

ft_uint16_t valor;

Ft_Gpu_Hal_StartTransfer (amfitrió, FT_GPU_READ, addr);

value = Ft_Gpu_Hal_Transfer16 (host, 0);

Ft_Gpu_Hal_EndTransfer (host);

valor de retorn;

}

ft_uint32_t Ft_Gpu_Hal_Rd32 (host Ft_Gpu_Hal_Context_t *, ft_uint32_t addr)

{

valor ft_uint32_t;

Ft_Gpu_Hal_StartTransfer (amfitrió, FT_GPU_READ, addr);

value = Ft_Gpu_Hal_Transfer32 (host, 0);

Ft_Gpu_Hal_EndTransfer (host);

valor de retorn;

}

ft_void_t Ft_Gpu_Hal_Wr8 (host Ft_Gpu_Hal_Context_t *, ft_uint32_t addr, ft_uint8_t v)

{

Ft_Gpu_Hal_StartTransfer (amfitrió, FT_GPU_WRITE, addr);

Ft_Gpu_Hal_Transfer8 (host, v);

Ft_Gpu_Hal_EndTransfer (host);

}

ft_void_t Ft_Gpu_Hal_Wr16 (host Ft_Gpu_Hal_Context_t *, ft_uint32_t addr, ft_uint16_t v)

{

Ft_Gpu_Hal_StartTransfer (amfitrió, FT_GPU_WRITE, addr);

Ft_Gpu_Hal_Transfer16 (host, v);

Ft_Gpu_Hal_EndTransfer (host);

}

ft_void_t Ft_Gpu_Hal_Wr32 (host Ft_Gpu_Hal_Context_t *, ft_uint32_t addr, ft_uint32_t v)

{

Ft_Gpu_Hal_StartTransfer (amfitrió, FT_GPU_WRITE, addr);

Ft_Gpu_Hal_Transfer32 (host, v);

Ft_Gpu_Hal_EndTransfer (host);

}



ft_void_t Ft_Gpu_HostCommand (Ft_Gpu_Hal_Context_t * host, ft_uint8_t cmd)

{

#ifdef MSVC_PLATFORM_SPI

ft_uint8_t Transfer_Array [3];

ft_uint32_t SizeTransfered;


Transfer_Array [0] = cmd;

Transfer_Array [1] = 0;

Transfer_Array [2] = 0;


SPI_Write (host-> hal_handle, Transfer_Array, sizeof (Transfer_Array), & SizeTransfered, SPI_TRANSFER_OPTIONS_SIZE_IN_BYTES | SPI_TRANSFER_OPTIONS_CHIPSELECT_ENABLE | SPI_TRANSFER_OPTIONS_CHIPSELECT_DISABLE);

#endif

#ifdef ARDUINO_PLATFORM_SPI

digitalWrite (FT_ARDUINO_PRO_SPI_CS, LOW);

SPI.transfer (cmd);

SPI.transfer (0);

SPI.transfer (0);

digitalWrite (FT_ARDUINO_PRO_SPI_CS, HIGH);

#endif

#ifdef MSVC_FT800EMU

// No implementat en FT800EMU

#endif

}


ft_void_t Ft_Gpu_ClockSelect (host Ft_Gpu_Hal_Context_t *, FT_GPU_PLL_SOURCE_T pllsource)

{

Ft_Gpu_HostCommand (host, pllsource);

}

ft_void_t Ft_Gpu_PLL_FreqSelect (Ft_Gpu_Hal_Context_t * host, FT_GPU_PLL_FREQ_T freq)

{

Ft_Gpu_HostCommand (host, freq);

}

ft_void_t Ft_Gpu_PowerModeSwitch (host Ft_Gpu_Hal_Context_t *, FT_GPU_POWER_MODE_T pwrmode)

{

Ft_Gpu_HostCommand (host, pwrmode);

}

ft_void_t Ft_Gpu_CoreReset (Ft_Gpu_Hal_Context_t * host)

{

Ft_Gpu_HostCommand (host, 0x68);

}


ft_void_t Ft_Gpu_Hal_Updatecmdfifo (Ft_Gpu_Hal_Context_t * host, compte ft_uint16_t)

{

host-> ft_cmd_fifo_wp = (host-> ft_cmd_fifo_wp + count) i 4095;


// Alineació de 4 bytes

host-> ft_cmd_fifo_wp = (host-> ft_cmd_fifo_wp + 3) i 0xffc;

Ft_Gpu_Hal_Wr16 (host, REG_CMD_WRITE, host-> ft_cmd_fifo_wp);

}


ft_uint16_t Ft_Gpu_Cmdfifo_Freespace (Ft_Gpu_Hal_Context_t * host)

{

ft_uint16_t plenitud, retval;


plenitud = (host-> ft_cmd_fifo_wp - Ft_Gpu_Hal_Rd16 (host, REG_CMD_READ)) i 4095;

retval = (FT_CMD_FIFO_SIZE - 4) - plenitud;

retorn (retval);

}

ft_void_t Ft_Gpu_Hal_WrCmdBuf (host Ft_Gpu_Hal_Context_t *, buffer ft_uint8_t *, compte ft_uint16_t)

{

ft_uint32_t longitud = 0, SizeTransfered = 0;

#define MAX_CMD_FIFO_TRANSFER Ft_Gpu_Cmdfifo_Freespace (host)

fer {

longitud = recompte;

si (longitud> MAX_CMD_FIFO_TRANSFER) {

length = MAX_CMD_FIFO_TRANSFER;

}

Ft_Gpu_Hal_CheckCmdBuffer (host, longitud);


Ft_Gpu_Hal_StartCmdTransfer (amfitrió, FT_GPU_WRITE, longitud);

#if definit (ARDUINO_PLATFORM_SPI) || definit (MSVC_FT800EMU)

SizeTransfered = 0;

while (length--) {

Ft_Gpu_Hal_Transfer8 (host, * buffer);

buffer ++;

SizeTransfered ++;

}

longitud = MidaTransferida;

#endif


#ifdef MSVC_PLATFORM_SPI

{

SPI_Write (host-> hal_handle, buffer, longitud, & SizeTransfered, SPI_TRANSFER_OPTIONS_SIZE_IN_BYTES);

longitud = MidaTransferida;

buffer + = SizeTransfered;

}

#endif

Ft_Gpu_Hal_EndTransfer (host);

Ft_Gpu_Hal_Updatecmdfifo (host, longitud);


Ft_Gpu_Hal_WaitCmdfifo_empty (host);


comptar - = longitud;

} while (count> 0);

}

#ifdef ARDUINO_PLATFORM_SPI

ft_void_t Ft_Gpu_Hal_WrCmdBufFromFlash (host Ft_Gpu_Hal_Context_t *, FT_PROGMEM buffer ft_prog_uchar8_t *, compte ft_uint16_t)

{

ft_uint32_t longitud = 0, SizeTransfered = 0;

#define MAX_CMD_FIFO_TRANSFER Ft_Gpu_Cmdfifo_Freespace (host)

fer {

longitud = recompte;

si (longitud> MAX_CMD_FIFO_TRANSFER) {

length = MAX_CMD_FIFO_TRANSFER;

}

Ft_Gpu_Hal_CheckCmdBuffer (host, longitud);


Ft_Gpu_Hal_StartCmdTransfer (amfitrió, FT_GPU_WRITE, longitud);



SizeTransfered = 0;

while (length--) {

Ft_Gpu_Hal_Transfer8 (host, ft_pgm_read_byte_near (buffer));

buffer ++;

SizeTransfered ++;

}

longitud = MidaTransferida;


Ft_Gpu_Hal_EndTransfer (host);

Ft_Gpu_Hal_Updatecmdfifo (host, longitud);


Ft_Gpu_Hal_WaitCmdfifo_empty (host);


comptar - = longitud;

} while (count> 0);

}

#endif

ft_void_t Ft_Gpu_Hal_CheckCmdBuffer (host Ft_Gpu_Hal_Context_t *, compte ft_uint16_t)

{

ft_uint16_t getfreespace;

fer {

getfreespace = Ft_Gpu_Cmdfifo_Freespace (host);

} while (getfreespace <>

}

ft_void_t Ft_Gpu_Hal_WaitCmdfifo_empty (host Ft_Gpu_Hal_Context_t *)

{

while (Ft_Gpu_Hal_Rd16 (host, REG_CMD_READ)! = Ft_Gpu_Hal_Rd16 (host, REG_CMD_WRITE));

host-> ft_cmd_fifo_wp = Ft_Gpu_Hal_Rd16 (host, REG_CMD_WRITE);

}

ft_void_t Ft_Gpu_Hal_WrCmdBuf_nowait (host Ft_Gpu_Hal_Context_t *, buffer ft_uint8_t *, compte ft_uint16_t)

{

ft_uint32_t longitud = 0, SizeTransfered = 0;

#define MAX_CMD_FIFO_TRANSFER Ft_Gpu_Cmdfifo_Freespace (host)

fer {

longitud = recompte;

si (longitud> MAX_CMD_FIFO_TRANSFER) {

length = MAX_CMD_FIFO_TRANSFER;

}

Ft_Gpu_Hal_CheckCmdBuffer (host, longitud);


Ft_Gpu_Hal_StartCmdTransfer (amfitrió, FT_GPU_WRITE, longitud);


// # ifdef ARDUINO_PLATFORM_SPI

#if definit (ARDUINO_PLATFORM_SPI) || definit (MSVC_FT800EMU)

SizeTransfered = 0;

while (length--) {

Ft_Gpu_Hal_Transfer8 (host, * buffer);

buffer ++;

SizeTransfered ++;

}

longitud = MidaTransferida;

#endif

#ifdef MSVC_PLATFORM_SPI

{

SPI_Write (host-> hal_handle, buffer, longitud, & SizeTransfered, SPI_TRANSFER_OPTIONS_SIZE_IN_BYTES);

longitud = MidaTransferida;

buffer + = SizeTransfered;

}

#endif


Ft_Gpu_Hal_EndTransfer (host);

Ft_Gpu_Hal_Updatecmdfifo (host, longitud);


// Ft_Gpu_Hal_WaitCmdfifo_empty (host);


comptar - = longitud;

} while (count> 0);

}



ft_uint8_t Ft_Gpu_Hal_WaitCmdfifo_empty_status (host Ft_Gpu_Hal_Context_t *)

{

si (Ft_Gpu_Hal_Rd16 (host, REG_CMD_READ)! = Ft_Gpu_Hal_Rd16 (host, REG_CMD_WRITE))

{

retorn 0;

}

més

{

host-> ft_cmd_fifo_wp = Ft_Gpu_Hal_Rd16 (host, REG_CMD_WRITE);

retorn 1;

}

}


ft_void_t Ft_Gpu_Hal_WaitLogo_Finish (host Ft_Gpu_Hal_Context_t *)

{

ft_int16_t cmdrdptr, cmdwrptr;


fer {

cmdrdptr = Ft_Gpu_Hal_Rd16 (host, REG_CMD_READ);

cmdwrptr = Ft_Gpu_Hal_Rd16 (host, REG_CMD_WRITE);

} while ((cmdwrptr! = cmdrdptr) || (cmdrdptr! = 0));

host-> ft_cmd_fifo_wp = 0;

}


ft_void_t Ft_Gpu_Hal_ResetCmdFifo (host Ft_Gpu_Hal_Context_t *)

{

host-> ft_cmd_fifo_wp = 0;

}


ft_void_t Ft_Gpu_Hal_WrCmd32 (host Ft_Gpu_Hal_Context_t *, ft_uint32_t cmd)

{

Ft_Gpu_Hal_CheckCmdBuffer (amfitrió, sizeof (cmd));

Ft_Gpu_Hal_Wr32 (host, RAM_CMD + host-> ft_cmd_fifo_wp, cmd);

Ft_Gpu_Hal_Updatecmdfifo (host, sizeof (cmd));

}


ft_void_t Ft_Gpu_Hal_ResetDLBuffer (host Ft_Gpu_Hal_Context_t *)

{

host-> ft_dl_buff_wp = 0;

}

/ * Commuta el pin PD_N de la placa FT800 per a un cicle de potència * /

ft_void_t Ft_Gpu_Hal_Powercycle (host Ft_Gpu_Hal_Context_t *, ft_bool_t)

{

si (fins)

{

#ifdef MSVC_PLATFORM

FT_WriteGPIO (host-> hal_handle, 0xBB, 0x08); // PDN configurat a 0, connecteu el cable BLAU del MPSSE al PDN # del tauler FT800

Ft_Gpu_Hal_Sleep (20);


FT_WriteGPIO (host-> hal_handle, 0xBB, 0x88); // PDN configurat a 1

Ft_Gpu_Hal_Sleep (20);

#endif

#ifdef ARDUINO_PLATFORM

digitalWrite (FT800_PD_N, LOW);

Ft_Gpu_Hal_Sleep (50);


digitalWrite (FT800_PD_N, HIGH);

Ft_Gpu_Hal_Sleep (50);

#endif

} més

{

#ifdef MSVC_PLATFORM

FT_WriteGPIO (host-> hal_handle, 0xBB, 0x88); // PDN configurat a 1

Ft_Gpu_Hal_Sleep (20);

FT_WriteGPIO (host-> hal_handle, 0xBB, 0x08); // PDN configurat a 0, connecteu el cable BLAU del MPSSE al PDN # del tauler FT800

Ft_Gpu_Hal_Sleep (20);

#endif

#ifdef ARDUINO_PLATFORM

digitalWrite (FT800_PD_N, HIGH);

Ft_Gpu_Hal_Sleep (20);

digitalWrite (FT800_PD_N, LOW);

Ft_Gpu_Hal_Sleep (20);

#endif

}

}



ft_void_t Ft_Gpu_Hal_WrMemFromFlash (host Ft_Gpu_Hal_Context_t *, ft_uint32_t addr, const ft_prog_uchar8_t * buffer, ft_uint32_t length)

{

ft_uint32_t SizeTransfered = 0;


Ft_Gpu_Hal_StartTransfer (amfitrió, FT_GPU_WRITE, addr);


#if definit (ARDUINO_PLATFORM_SPI) || definit (MSVC_FT800EMU)

while (length--) {

Ft_Gpu_Hal_Transfer8 (host, ft_pgm_read_byte_near (buffer));

buffer ++;

}

#endif


#ifdef MSVC_PLATFORM_SPI

{

SPI_Write ((FT_HANDLE) host-> hal_handle, buffer, longitud, & SizeTransfered, SPI_TRANSFER_OPTIONS_SIZE_IN_BYTES);

}

#endif



Ft_Gpu_Hal_EndTransfer (host);

}


ft_void_t Ft_Gpu_Hal_WrMem (Ft_Gpu_Hal_Context_t * host, ft_uint32_t addr, const ft_uint8_t * buffer, ft_uint32_t length)

{

ft_uint32_t SizeTransfered = 0;


Ft_Gpu_Hal_StartTransfer (amfitrió, FT_GPU_WRITE, addr);


#if definit (ARDUINO_PLATFORM_SPI) || definit (MSVC_FT800EMU)

while (length--) {

Ft_Gpu_Hal_Transfer8 (host, * buffer);

buffer ++;

}

#endif


#ifdef MSVC_PLATFORM_SPI

{

SPI_Write ((FT_HANDLE) host-> hal_handle, buffer, longitud, & SizeTransfered, SPI_TRANSFER_OPTIONS_SIZE_IN_BYTES);

}

#endif



Ft_Gpu_Hal_EndTransfer (host);

}



ft_void_t Ft_Gpu_Hal_RdMem (Ft_Gpu_Hal_Context_t * host, ft_uint32_t addr, ft_uint8_t * buffer, ft_uint32_t length)

{

ft_uint32_t SizeTransfered = 0;


Ft_Gpu_Hal_StartTransfer (amfitrió, FT_GPU_READ, addr);


#if definit (ARDUINO_PLATFORM_SPI) || definit (MSVC_FT800EMU)

while (length--) {

* buffer = Ft_Gpu_Hal_Transfer8 (host, 0);

buffer ++;

}

#endif


#ifdef MSVC_PLATFORM_SPI

{

SPI_Read ((FT_HANDLE) host-> hal_handle, buffer, longitud, & SizeTransfered, SPI_TRANSFER_OPTIONS_SIZE_IN_BYTES);

}

#endif


Ft_Gpu_Hal_EndTransfer (host);

}


ft_int32_t Ft_Gpu_Hal_Dec2Ascii (ft_char8_t * pSrc, valor ft_int32_t)

{

ft_int16_t Longitud;

ft_char8_t * pdst, charval;

ft_int32_t CurrVal = valor, tmpval, i;

ft_char8_t tmparray [16], idx = 0;


Longitud = strlen (pSrc);

pdst = pSrc + Longitud;


si (0 == valor)

{

* pdst ++ = '0';

* pdst ++ = '';

retorn 0;

}


si (CurrVal <>

{

* pdst ++ = '-';

CurrVal = - CurrVal;

}

/ * inseriu el valor * /

mentre (CurrVal> 0) {

tmpval = CurrVal;

CurrVal / = 10;

tmpval = tmpval - CurrVal * 10;

charval = '0' + tmpval;

tmparray [idx ++] = charval;

}


per (i = 0; i

{

* pdst ++ = tmparray [idx - i - 1];

}

* pdst ++ = '';


retorn 0;

}


ft_void_t Ft_Gpu_Hal_Sleep (ft_uint16_t ms)

{

#if definit (MSVC_PLATFORM) || definit (MSVC_FT800EMU)

Sleep (ms);

#endif

#ifdef ARDUINO_PLATFORM

retard (ms);

#endif

}